International Design and Test WorkshopIDT 2007Cairo, December 16-18, 2007 |
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Important Dates Submission Deadline: October 15th, 2007 Acceptance Letter: October 30th, 2007 Final Version: November 16th, 2007 |
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Workshop Program |
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Sunday Dec 16th, 2007 09:00-10:00 Registration
10:00-10:15 Opening Session
Welcome Address Conference Co-Chairs: Hazem ElTahawy, Mentor Graphics, Egypt Yervant Zorian, Virage Logic, USA
Program Committee Report Program Co-Chairs: Ashraf Salem, Mentor Graphics, Egypt Andre Ivanov, University of British Columbia, Canada
10:15-10:30 Honorary Speech
H.E. Dr. Tarek Kamel Minister of Communication and Information Technology
10:30-11:30 Conference Keynote Speech Finding 10 X Changes in Design Dr. Walden C. Rhines, CEO, Mentor Graphics, USA
11:30-12:00 Coffee Break
11:30-12:00 Poster Session Chair: Watheq El-Kharashi, Ain Shams University, Egypt
Power Grid Automatic Metal Filling Algorithm Forming Maximum on-chip Decoupling Capacitance
Measurement Environment for Reliability Study of High Current First Level Interconnections
An FPGA-Based Architecture for ECC Point Multiplication
Proxels for Reliability Assessment of Future Nano-Circuits
Accelerating Matrix Multiplication on FPGAs
Modeling Burst Interferences-A Practical Tool for Studying Leak Signals
12:00-13:30 Panel Sessions Electronics Design Industry in The Middle East: It is a fancy or a way to grow Moderator: Hazem El Tahawy, Mentor Graphics, Egypt
Panelists: Walden Rhines, Mentor Graphics, USA Magdy Abadir, Freescale, USA Yervant Zorian, Virage Logic, USA Ashraf Badawi, Intel, UK Hisham Haddara, Si-Ware Systems, Egypt Khaled Ismail, Sysdisoft, Egypt
13:30-14:30 Lunch
14:30-15:30 Panel Session Developing Standard Automotive eSW Drivers Moderator: Hisham Soultan, IBM, Egypt
Panelists: Saffey El-Din Khalil, IBM Egypt Mohamed Madbouly, IBM Egypt Amr El-Dessouky, IBM Egypt
15:30-17:00 Session 1: Memory Test, On-Line Testing & Test Generation Chair: John Hayes, University of Michigan, USA Ayman Wahba, Ain Shams University, Egypt
Precise Identification of Memory Faults Using Electrical Simulation
An Investigation on Capacitive Coupling in RAM Address Decoders
Multi-Cycle Fault Injections in Error Detecting Implementations of the Advanced Encryption Standard
A Novel Method of Test Generation for Asynchronous Speed Independent Circuits
15:30-17:00 Session 2: Mixed-Signal And RF Design Chair: Hisham Haddara, Si-Ware Systems, Egypt Mehrdad Nourani, Univ. of Texas at Dallas, USA
A Reconfigurable and Programmable Filter for Software Defined Radio
Narrowband Interference Suppression for Direct Conversion Software Radios
Ultra Low Power Narrow Band LNA
Bandwidth Extension of CMOS Transimpedance Amplifier Using On-Chip Spiral Inductor
17:00-17:15 Coffee Break
17:15-18:30 Session 3: Memory Testing And FPGA Based Design Chair: Magdy Fikry, Cairo University, Egypt Said Hamdioui, Delft University, Netherlands
Improving Software Based Self - Testing for Cache Memories
Using Reconfigurable Computers for DSP Image Processing
A Topology-Based Design Methodology For Networks-On-Chip Applications
17:15-18:45 Mentor Graphics Higher Education Program Workshop Chair: Nevine Darwish, Cairo University, Egypt Ian Burgess, Mentor Graphics, USA
Equalizer Implementation for 10Gbps Serial Data Link In 90nm CMOS Technology Ahmed Adel Abdel Fatah, Ahmed Mohamed Arafa, Dina Reda Abdel Hay, Fady Atef Naguib Mohamed, Marwa Mostafa and Mohamed Omar Abdel Aziz, Ain Shams University, Egypt
Design and Implementation of An 11-bit Non-Linear Interpolation DAC Salah M. Esia, Khaled Shehata and Hani F. Ragai, Arab Academy, Egypt
CUSPARC ASIC & Bluetooth II EDR Application implemented on Stratix II FPGA A. Abdel Mordy Ayoub, A. Amr Abdel Wahab, A. Hassan Mostafa and M. Kamal Abdel Fattah, Cairo University, Egypt
FPGA Design, Implementation And Analysis Of Scalable Low Power Radix 4 Montgomery Multiplication Algorithm A. A. Ibrahim, H. A. El Simary, Electronics Research Institute, Egypt, A. M. Nassar, Cairo University, Egypt
Monday Dec 17th, 2007 09:00-10:00 Registration
10:00-10:45 Tutorial Planning for Functional Verification Closure Mohamed Salem- Mentor Graphics, Egypt, Harry Foster – Mentor Graphics, USA
10:45-12:15 Panel Teaching VLSI in MEA Moderator: Alaa El-Rouby, Intel, Egypt
Panelists: Hany Fikry, French University, Egypt Serag Habib, Cairo University, Egypt Hasanen Amer, AUC, Egypt Emad Hegazy, Sysdisoft, Egypt Ayman ElSayed, Si-Ware Systems, Egypt Watheq El-Kharashi, Ain Shams University, Egypt
12:15-12:30 Coffee Break
12:30-13:45 Session 4: Test Generation, Defect-Based Test & BIST Chair: Adeeb Ghoniemy, Ain Shams University, Egypt Oleg Panfilov, Terocelo, Inc, USA
Generation of Power-Constrained Scan Tests And Its Difficulty
Transient Current Testing of Gate-Oxide Shorts in CMOS Beirut - Lebanon), Ayman Kayssi (American University of Beirut - Lebanon), Ali Ghandour (American University of Beirut - Lebanon)
A Power Measuring Technique For Built-In Testing Of Electrochemical Sensors For Environmental Monitoring
12:30-13:45 Session 5: Fault Tolerance & Analysis Chair: Khaled El-Ayat, AUC, Egypt Zaid Al Ars, Delft University, Netherlands
A Hazard-Free Majority Voter For TMR-Based Fault Tolerance in Asynchronous Circuits
Analysis of Laser-Based Attack Effects On A Synchronous Circuit
Recovery From Transition Errors In Sequential Circuits
13:45-14:30 Lunch
14:30-16:00 Session 6 : DFT and Low Power Design Chair: Serag Habib, Cairo University, Egypt Sobeeh Al Mukhaizim, Kuwait University, Kuwait
Adopting the Scan Approach For A Fault Tolerant Asynchronous Clock Generation Circuit
Low Power Small Area High Performance 2D-DCT architecture
Design of Real Time Multiprocessor System on Ship
Reliability Analysis and Distributed Voting for NMR Nanoscale Systems
14:30-16:00 Session 7: Fault Modeling & Analysis Chair: Khaled Shehata, AAST, Egypt Sezer Goren, Bahcesehir University - Turkey
Accurate Nano-Circuits Reliability Evaluations Based on Hybrid Monte Carlo—Numerical Simulations
Exploiting RAM For Fault-Tolerant Functions in FPGA
CNTFET-Based CMOS-like Gates and Dispersion of Characteristics
16:00-16:15 Coffee Break
16:15-17:45 Session 8 : Design Verification & Optimization Chair: Hamed ElSimary, ERI, Egypt Ali Chehab, AUB, Lebanon
Verification of the Properties of Asynchronous Real-Time Distributed Systems using the B-Formalism
Optimization of Interacting Controllers Using K-wise Tests
Fast FPGA-Based Delay Estimation for a Novel Hardware/Software Partitioning Scheme
A High Performance ASIC Based Elliptic Curve Cryptographic Processor over GF(p)
16:15-17:45 Session 9: Analog And Mixed-Signal Test Chair: Harry Foster, Mentor Graphics, USA Emad Hegazy, Sysdisoft, Egypt
Software-Based BIST for Analog to Digital Converters in SoC
An Auto-Sensitivity Control Circuit Using Analog Topology for Wired CDMA Bus Interface
Switched-Capacitor Analog Correlator using Balanced Charge Pump Circuit for CDMA Bus Interface
20:00-22:00 Conference Banquet (Nile Marquise Cruise, Grand Hyatt)
Tuesday Dec 18th, 2007
09:00-10:00 Registration
10:00-10:45 Invited paper Chair: Ashraf Salem, Mentor Graphics, Egypt
Dual Mode PCGCs for Advanced Wireless Communication networks Hatim M. Behairy, KACST
10:45-11:00 Coffee Break
11:00-13:00 Session 10: SOC/NOC/MPSOC Chair: Hazem Abbas, Mentor Graphics, Egypt Sanja Lazarova-Molnar, UAEU, UAE
Optimized Area and Optimized Speed Hardware Implementations of AES on FPGA
System Level Power and Energy Modeling for Signal Processing Applications
A Low-Power Haar-Wavelet Preprocessing Approach for a SNN Olfactory System
A High-Speed, Low-Area Processor Array Architecture for Multiplication and Squaring over GF(2^m)
Performance Analysis of Networks-on-Chip Routers
11:00-13:00 Session 11: Layout Design & Verification Chair: Hany Fikry, French University, Egypt Tsuyoshi Iwagaki, Japan Advanced Institute of Science and Technology - Japan
A Novel General Graph-Based Simplex Algorithm Applied to IC Layout Compaction and Migration
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