International Design and Test Workshop

IDT 2007

Cairo, December 16-18, 2007

Important Dates

Submission Deadline:

October 15^th, 2007

Acceptance Letter:

October 30^th, 2007

Final Version:

November 16^th, 2007

Topics include, but are not limited to, the following:

Design Methods and Tools:

· Nanotechnology architectures

· MEMs

· Quantum computing

· Mixed-signal and RF design

· Circuit simulation and timing analysis

· IC physical design automation

 

Test Methods and Tools:

· DFT

· Synthesis for testability

· Test generation

· Test simulation

· iDDQ testing

· Defect-based test

· Fault modeling

· Test issues in nanotechnology

· BIST

· Design for verification

 

· Power analysis and low power design

· Design verification

· Logic synthesis

· SOC/NOC/MPSOC design issues

· Packaging

· Design for manufacturability

 

· Memory and FPGA test and repair

· SOC/NOC/MPSOC test

· Automatic test equipment

· Analog and mixed-signal test

· On-line testing

· Test resource partitioning

· Failure analysis

· Fault tolerance

· Process monitoring and control

· Economics of test

 

Workshop Topics